About me
I am a Ph.D. candidate at Yonsei University advised by Professor Joon-Sung Yang. I design AI accelerators and hardware-efficient machine learning techniques such as quantization to reduce latency, boost throughput, and improve energy efficiency. I also study memory reliability to build fault-tolerant deep neural networks (DNNs).
Interests
- AI/ML
- AI Accelerator
- Memory Reliability
Education
PhD in Electrical and Electronic Engineering, 2026 (Expected)
Yonsei University
BS in Electrical and Electronic Engineering, 2023
Yonsei University
Publications
(2025).
DBC: Drift-aware Binary Code for Drift-tolerant Deep Neural Networks.
2025 62th ACM/IEEE Design Automation Conference (DAC).
(2025).
Bit-slice Architecture for DNN Acceleration with Slice-level Sparsity Enhancement and Exploitation.
2025 IEEE International Symposium on High-Performance Computer Architecture (HPCA).
(2024).
ViT-slice: End-to-end Vision Transformer Accelerator with Bit-slice Algorithm.
2024 61th ACM/IEEE Design Automation Conference (DAC).
(2023).
RQ-DNN: Reliable Quantization for Fault-tolerant Deep Neural Networks.
2023 60th ACM/IEEE Design Automation Conference (DAC) Late Breaking Results.
(2022).
Bipolar vector classifier for fault-tolerant deep neural networks.
2022 59th ACM/IEEE Design Automation Conference (DAC).
Skills
Technical
Python
C/C++
Verilog
Hobbies
Programming
Tennis
Games
Contact
- insuofficial@yonsei.ac.kr
- Room 411, Engineering Research Park, Yonsei University, 50 Yonsei-ro, Sinchon-dong, Seoul, South Korea 03722